This invention is directed to a semiconductor processing and more particularly to the reducing the effects of chemically active species on susceptible dielectric materials.
Degradation can occur in low dielectric constant materials (low k) when those low k materials come into contact with a chemically active species, such as oxygen and/or fluorine. This degradation is a serious concern because it represents a potential failure mechanism for an integrated circuit. The degradation problem is costly to the industry by virtue of process monitoring, inspections, chip yield and equipment maintenance requirements that it entails. Types of degradation problems typically occurring in low k processing are widening of the features (loss of critical dimensions), profile degradation (bowing or undercutting), and roughening of the sidewalls of the features.
The production of advanced semiconductor devices is becoming increasingly complicated by changes in dielectric materials. Lower dielectric constant materials are necessary to ensure faster speeds and greater reliability necessary for advanced semiconductor devices. During the processing of low k film stacks, a variety of films may have to be etched. For example, as shown in FIG. 1, it is necessary to etch films to form features. An opening 15, is formed in a layer of photoresist, 5, by any means known in the art, the opening, 15, has a width, w1. The photoresist layer, 5, may contain an antireflective coating (ARC) and other layers may exist between the photoresist and the substrate. For example, hardmasks such as silicon nitride or silicon dioxide may be embedded between the photoresist and the substrate. When the substrate, 10 is etched, the shape of the feature can be changed by the chemical and physical interactions of the gas phase species (such as F, fluorine, or O, oxygen) with the photoresist, hardmask and or substrate sidewalls. Typically, when the substrate, 10, is etched in an environment containing chemically active species, such as F and O, the width of the feature, 15, is increased, w2, as shown in FIG. 2. The initial width, w1, of the feature, 15, is shown with a dotted line in FIG. 2. While it is possible to create the initial width in the photoresist that attempts to anticipate the changes that can occur when etching a low k material in a fluorine containing environment, it is more advantageous to try to create an environment in the etch chamber that allows control the shape of the profile.
Fluorine contamination is also a concern in that it can affect the dielectric constant (and stress) of a low k film. For example, undoped PECVD silane oxide has a relative dielectric constant of 4.3. While a fluorine doped silane oxide film can have a lower dielectric constant, the film stress of the fluorine containing film, as quantified by a FLEXUS, increases. These factors can not often be accurately accounted for as the fluorine doping is not intentional and may not be reliably predicted. Thus, there remains a need for a method for reducing the effects of fluorine containing environment on the patterning of low k materials.
The present invention details a method by which control over profile parameters, such as undercut, sidewall bowing, corner rounding and/or critical dimensions can be achieved. The method described here need not employ additional manufacturing tooling since it can be performed in at least some families of existing tools. However, ex-situ processing is feasible also.
It is therefore an object of the present invention to provide a method for decreasing the effects of liberated chemically active species on low k materials.
It is also an object of the present invention to provide an in situ method of reducing CD loss in low k dielectrics.
These and other objectives are achieved in the present invention by providing a method for maintaining profile control during the etching of dielectrics, comprising the steps of:
depositing a layer of photoresist over a layer of dielectric;
patterning the photoresist such that voids are formed in the photoresist, the voids having sidewalls and a bottom;
depositing an overlayer in an etch chamber;
transferring the patterning in the photoresist to the dielectric.